atomiq.components.sinara

Submodules

• atomiq.components.sinara.dac
• atomiq.components.sinara.kasli
• atomiq.components.sinara.sampler
• atomiq.components.sinara.suservo
• atomiq.components.sinara.urukul

Classes

Urukul	Sinara Urukul 4 Channel DDS
UrukulChannel	Single DDS Channel of a Sinara Urukul
Kasli	Kasli Module
DioInput	Fast Digital Input Channel Attached to Kasli
DioOutput	Fast Digital Output Channel Attached to Kasli
Sampler	Sinara Sampler 8 Channel ADC
SamplerChannel	Single ADC Channel of a Sinara Sampler

Package Contents

class atomiq.components.sinara.Urukul(cpld, default_profile=7, *args, **kwargs)

Bases: atomiq.components.primitives.Component

Sinara Urukul 4 Channel DDS

This class represents the Sinara Urukul 4 channel DDS RF source.

Parameters:

• cpld (artiq.coredevice.urukul.CPLD) -- The ARTIQ cpld device from the device_db, e.g. @urukul0_cpld.

• default_profile (artiq.language.types.TInt32) -- Which profile in the Urukul CPLD to use by default, i.e. if no profile is given (default 7)

kernel_invariants

cpld

profile = 7

_prerun()

Specify here what should be done for this component before the run starts. In contrast to the _build() method, the _prerun() routine is executed on the core device before the actual experiment starts.

_set_profile_artiq9(profile=ad9910.DEFAULT_PROFILE, trigger=True)

Set the Urukul to the given profile.

Parameters:

• profile (TInt32) -- profile

• trigger (TBool) -- pulse io_update

set_profile(profile=ad9910.DEFAULT_PROFILE, trigger=True)

Set the Urukul to the given profile.

Parameters:

• profile (TInt32) -- profile

• trigger (TBool) -- pulse io_update

class atomiq.components.sinara.UrukulChannel(urukul, device, ttl=None, default_attenuation=19.0, profile_arb=0, use_drg=True, auto_sync_drg=0, read_delay=np.int64(8000), write_delay=np.int64(8000), calc_delay_modifier=np.int64(7), *args, **kwargs)

Bases: atomiq.components.electronics.rfsource.RFSource, atomiq.components.primitives.Switchable

Single DDS Channel of a Sinara Urukul

Parameters:

• urukul (Urukul) -- The Urukul component this channel belongs to

• device (artiq.language.types.TStr) -- The ARTIQ device from the device_db representing the Urukul channel, e.g. @urukul0_ch0

• ttl -- The ARTIQ device from the device_db representing the Urukul fast RF switch, e.g. @ttl_urukul0_sw0

• default_attenuation -- Default attenuation to set for the channel on startup. (default -19dBm)

• profile_arb (artiq.language.types.TInt32) -- Profile on the DDS to use for arbitrary function generation. (default 0)

• use_drg (artiq.language.types.TBool) -- Use the DRG for amplitude or frequency ramps (recommended). (default True)

• auto_sync_drg (artiq.language.types.TInt32) -- Defined if the drg is synced to either frequency (1) or amplitude (2) in the prepare phase. Default is not synced (0). Syncing is recommended in combination with blind if continuous operation is required.

• read_delay (artiq.language.types.TInt64) -- Delay necessary for read operations of 64bit in mu. This is hardware specific and can be obtained from calibrate_read_write_delays().The default value is conservative but fine for most uses. If you need to for example run drg ramps in quick succession you should adjust this.

• write_delay (artiq.language.types.TInt64) -- Delay necessary for write operations of 64bit in mu. See read_delay for more info.

• calc_delay_modifier (artiq.language.types.TInt64) -- Multiplier for delays inserted into function code to accommodate for CPU calculation time and avoid underflow. If necessary you can try to reduce the conservative default value. Specifically for Kasli SoC, the necessary multiplier is smaller.

Tip

The ramp() method can be used in combination with the blind component argument. This allows for generating continous, jump-free ramps between experiments. This makes it possible to use the dds output to generate a lock signal for a laser cavity lock.

Attention

Setting parameters before the DRG is synced with the python object would break the continuity. Run sync_drg() before setting amplitude, frequency or phase parameters or use auto_sync_drg.

kernel_invariants

urukul

device

attenuation = 19.0

profile_arb = 0

profile_default = 7

use_drg = True

auto_sync_drg = 0

read_delay

write_delay

calc_delay_modifier

init()

Initialize the urukul channel. Necessary only once after power on.

Warning

This function is not called automatically as it is slow and resets the device leading to a frequency/amplitude jump.

_prerun()

Specify here what should be done for this component before the run starts. In contrast to the _build() method, the _prerun() routine is executed on the core device before the actual experiment starts.

_prerun_blind()

set(frequency=float('nan'), amplitude=float('nan'), phase=0.0, profile=-1)

Set the frequency and amplitude. Frequency/amplitude are set to the last known value if float("nan") is passed (default).

Parameters:

• frequency (artiq.language.types.TFloat) -- Frequency in Hz (float("nan") to use previous value)

• amplitude (artiq.language.types.TFloat) -- Amplitude in units of full scale (float("nan") to use previous value)

• phase (artiq.language.types.TFloat) -- Phase tuning word in turns

• profile (artiq.language.types.TInt32) -- DDS Profile (-1 to keep current profile)

set_att(attenuation)

Set the hardware attenuation for this urukul channel via CPLD.

Parameters:

attenuation (artiq.language.types.TFloat) -- channel attenuation (0. to 31.0 in 0.5 increments) [dB]

_set_frequency(frequency)

Parameters:

frequency (artiq.language.types.TFloat)

_set_amplitude(amplitude)

Parameters:

amplitude (artiq.language.types.TFloat)

_set_phase(phase)

Parameters:

phase (artiq.language.types.TFloat)

on()

Turn on via ttl.

:return

off()

Turn off via ttl.

:return

_on_cpld()

_off_cpld()

calibrate_read_write_delays(security_factor=1.4)

Helper function to calibrate the delays necessary in high level functions when writing and reading registers from the DDS to avoid underflows.

The default values for the component arguments read_delay and write_delay are conservative and should generally work. If you need fast successive drg ramps you can obtain your hardware specific values with this method and try to lower the delays in your components db.

Parameters:

security_factor (artiq.language.types.TFloat) -- Factor with which the returned delay values are multiplied. Since the CPU is non-deterministic the real calculation time can vary, which is compensated by the security factor.

Returns:

The read (0) and write (1) delays in machine units.

Return type:

tuple[TInt64, TInt64]

Attention

This method turns off the urukul output writes into the drg registers and therefore brings the drg out of sync. It is generally not meant to run within a real experiment but for one-time callibration.

amplitude_to_drg_step(val)

Parameters:

val (artiq.language.types.TFloat)

Return type:

artiq.language.types.TInt32

read64_32(addr)

Read two 32-bit values from 64-bit register. Advances time cursor by 8640ns and removes all slack

Parameters:

addr (artiq.language.types.TInt32) -- Register address

Returns:

Tuple of two 32-bit integer register values

_drg_write_registers(ramp_low, ramp_high, step_word)

Writes the registers for drg ramp limits and step size. Advances time cursor by 2496ns

Parameters:

• ramp_low (artiq.language.types.TInt32)

• ramp_high (artiq.language.types.TInt32)

• step_word (artiq.language.types.TInt32)

sync_drg(target)

Synchronises the python object with the current register values of the DRG. Advances time cursor by 25us.

Parameters:

target (artiq.language.types.TInt32) -- Target to synchronise to. 1 for frequency, 2 for amplitude.

_write_drg_ramp(ramp_rate, end_val, old_low, old_high, step)

Parameters:

• ramp_rate (artiq.language.types.TInt32)

• end_val (artiq.language.types.TInt32)

• old_low (artiq.language.types.TInt32)

• old_high (artiq.language.types.TInt32)

• step (artiq.language.types.TInt32)

_amplitude_ramp_drg(duration, amplitude_start, amplitude_end, ramp_timestep=0.0002)

Parameters:

• duration (artiq.language.types.TFloat)

• amplitude_start (artiq.language.types.TFloat)

• amplitude_end (artiq.language.types.TFloat)

• ramp_timestep (artiq.language.types.TFloat)

_frequency_ramp_drg(duration, frequency_start, frequency_end, ramp_timestep)

Parameters:

• duration (artiq.language.types.TFloat)

• frequency_start (artiq.language.types.TFloat)

• frequency_end (artiq.language.types.TFloat)

• ramp_timestep (artiq.language.types.TFloat)

_ramp(duration, frequency_start, frequency_end, amplitude_start, amplitude_end, ramp_timestep=5e-05)

This method implements a stupid ramp on an abstract level. This will most likely work but be slow. If your hardware has native support for ramping, please override this function when you inherit from RFSource

Parameters:

• duration (artiq.language.types.TFloat)

• frequency_start (artiq.language.types.TFloat)

• frequency_end (artiq.language.types.TFloat)

• amplitude_start (artiq.language.types.TFloat)

• amplitude_end (artiq.language.types.TFloat)

• ramp_timestep (artiq.language.types.TFloat)

ramp(duration, frequency_start=float('nan'), frequency_end=float('nan'), amplitude_start=float('nan'), amplitude_end=float('nan'), ramp_timestep=float('nan'), ramp_steps=-1)

Ramp frequency and amplitude over a given duration. Parameters default to -1 or nan to indicate no change. If the start frequency/amplitude is set to nan, the ramp starts from the last frequency/amplitude which was set. This method advances the timeline by ´duration´

Tip

This method can be used in combination with the blind component argument. This allows for generating continuous, jump-free ramps between experiments. This makes it possible to use the dds output to generate a lock signal for a laser cavity lock. Note that in this mode using amplitude and frequency ramps leads to undefined behavior when switching between them. As the DRG can only address either amplitude or frequency, parallel ramps of both parameters are ramped in a simple step by step way. Usage of the DRG can be avoided by setting the component attribute use_drg to False.

Attention

When using the DRG, this method always advances the timeline by at least 10us, even if the ramp is shorter. Reading and writing of DDS registers is scheduled in the past, this means no drg changes should be made in the ~100us (dependent on read_delay and write_delay) before this function is called.

Parameters:

• duration (artiq.language.types.TFloat) -- ramp duration [s]

• frequency_start (artiq.language.types.TFloat) -- initial frequency [Hz]

• frequency_end (artiq.language.types.TFloat) -- end frequency [Hz]

• amplitude_start (artiq.language.types.TFloat) -- initial amplitude [0..1]

• amplitude_end (artiq.language.types.TFloat) -- end amplitude [0..1]

• ramp_timesteps -- time between steps in the ramp [s]

• ramp_steps (artiq.language.types.TInt32) -- number of steps the whole ramp should have. This takes precedence over ramp_timesteps

• ramp_timestep (artiq.language.types.TFloat)

_write_ram(data, transform=identity_float_int32)

Write data to RAM.

Note

This is copied from upstream artiq to fix a bug, where the data is written into the RAM in reversed order. Once this is fixed upstream, we can remove this

The profile to write to and the step, start, and end address need to be configured before and separately using set_profile_ram() and the parent CPLD set_profile.

Parameters:

data (TList(TFloat)) -- Data to be written to RAM.

_arb(duration, samples_amp, samples_freq, samples_phase, repetitions=1, prepare_only=False, run_prepared=False, transform_amp=identity_float, transform_freq=identity_float, transform_phase=identity_float)

Parameters:

• duration (artiq.language.types.TFloat)

• samples_amp (TList(TFloat))

• samples_freq (TList(TFloat))

• samples_phase (TList(TFloat))

• repetitions (artiq.language.types.TInt32)

• prepare_only (artiq.language.types.TBool)

• run_prepared (artiq.language.types.TBool)

_prepare_arb(samples, t_step, repeat=False, ram_offset=0, profile=0, transform=identity_float_int32)

Prepare a RAM profile for arbitrary amplitude modulation with amplitude values and equidistant time steps.

Parameters:

• samples (TList(TFloat)) -- List of sample values in units im machine units. Maximum lenght is 1024 samples.

• t_step (artiq.language.types.TFloat) -- Time that should pass between the samples of the amplitudes list in units of s.

• repeat (artiq.language.types.TBool) -- Should the sequence of samples be repeated? If not the last value is hold. (default False)

• ram_offset (artiq.language.types.TInt32) -- Address offset of the RAM storage address. (default 0)

• profile (artiq.language.types.TInt32) -- Profile of the DDS to use for the RAM mode. If none is given, profile 0 is used.

Return type:

artiq.language.types.TInt32

_run_arb(duration, ram_destination, trigger=True, profile=-1, start_time=0)

Parameters:

• duration (artiq.language.types.TFloat)

• ram_destination (artiq.language.types.TInt32)

• trigger (artiq.language.types.TBool)

• profile (artiq.language.types.TInt32)

• start_time (artiq.language.types.TInt64)

arb(duration, samples_amp=[], samples_freq=[], samples_phase=[], repetitions=1, prepare_only=False, run_prepared=False, transform_amp=identity_float, transform_freq=identity_float, transform_phase=identity_float)

Play Arbitrary Samples from a List

This method allows to set the output amplitude, frequency an phase according to the values specified in respective lists. The whole sequence is played in the specified duration. The pattern store in the sample list can also be repeated.

Tip

We supports a scheme to prepare the arb function before it is actually used. If that is needed, run this function with prepapre_only = True when the arb should be prepared and with run_prepared = True when the prepared arb should be played. In both calls the other parameters have to be passed.

Attention

This method always advances the timeline by at least 1.5us, even if the arb sample is shorter. Reading and writing of DDS registers is scheduled in the past, this means no drg changes should be made in ~5us (for run_prepared=True, if wrtiting to RAM, this time is longer) before the function call.

Parameters:

• samples_amp (TList(TFloat)) -- List of amplitude samples. If this list is empty (default), the amplitude is not modified.

• samples_freq (TList(TFloat)) -- List of frequency samples. If this list is empty (default), the frequency is not modified.

• samples_phase (TList(TFloat)) -- List of phase samples. If this list is empty (default), the phase is not modified.

• duration (artiq.language.types.TFloat) -- The time in which the whole sequence of samples should be played back [s].

• repetitions (artiq.language.types.TInt32) -- Number of times the sequence of all samples should be played. (default 1)

• prepare_only (artiq.language.types.TBool) -- Only write the sequence to RAM, don't play it.

• run_prepared (artiq.language.types.TBool) -- Play arb sequence previously prepared with prepare_only.

• transform_amp -- Function to transform amplitude samples, must take a single argument of type TFloat and return a single TFloat.

• transform_freq -- Function to transform frequency samples (see transform_amp).

• transform_phase -- Function to transform phase samples (see transform_amp).

class atomiq.components.sinara.Kasli(*args, **kwargs)

Bases: atomiq.components.primitives.Component

Kasli Module

class atomiq.components.sinara.DioInput(kasli, ttl, *args, **kwargs)

Bases: atomiq.components.primitives.Component, atomiq.components.primitives.Measurable

Fast Digital Input Channel Attached to Kasli

This class describes the fast digital input channels directly attached to your Kasli.

Parameters:

• kasli (Kasli) -- Kasli module that this digital input belongs to

• ttl -- ARTIQ device from device_db.py for the DIO channel

kernel_invariants

kasli

ttl

measure()

wait_for_trigger(timeout, edge='rising', log=False, keep_open=False)

Wait for a trigger to occur. This function sets the time cursor to the time where the trigger edge is detected. If no edge is detected in the given timeout, the time cursor is set to the end of the gating window (set by timeout).

Parameters:

• timeout (artiq.language.types.TFloat) -- Timeout in seconds

• edge (artiq.language.types.TStr) -- Edge to wait for (rising or falling)

• log (artiq.language.types.TBool) -- If True emits a warning if no trigger is detected

• keep_open (artiq.language.types.TBool) -- True keeps the gate open after the trigger window. This can be used to rapidly trigger on subsequent pulses on the microsecond timescale. Note that the trigger listener must be closed manually afterwards by either running this function with keep_open=True or by calling self.ttl._set_sensitivity(0) to avoid kernel slowdown.

Returns:

True if a trigger is detected, False if not

Return type:

bool

Info:

Typically a delay of about 2 us is necessary after this command to avoid underflows.

class atomiq.components.sinara.DioOutput(kasli, ttl, *args, **kwargs)

Bases: atomiq.components.primitives.Component, atomiq.components.primitives.Switchable

Fast Digital Output Channel Attached to Kasli

This class describes the fast digital output channels directly attached to your Kasli.

Parameters:

• kasli (Kasli) -- Kasli module that this digital output belongs to

• ttl -- ARTIQ device from device_db.py for the DIO channel

kernel_invariants

kasli

ttl

on()

off()

class atomiq.components.sinara.Sampler(sampler_device, default_gain=[0] * 8, *args, **kwargs)

Bases: atomiq.components.electronics.adc.ADC

Sinara Sampler 8 Channel ADC

This class represents the Sinara Sampler with all its 8 channels. It allows to sample all channels at once and to read out the result.

Parameters:

• sampler_device -- The ARTIQ device for the sampler from the device_db, e.g. @sampler0

• default_gain (TList(TInt32)) -- List with 8 entries setting the default gain for the 8 channels at startup. (default [0, .. , 0])

kernel_invariants

_sampler_device

default_gain = [0, 0, 0, 0, 0, 0, 0, 0]

_prerun()

Specify here what should be done for this component before the run starts. In contrast to the _build() method, the _prerun() routine is executed on the core device before the actual experiment starts.

set_gain(channel, gain=0)

Parameters:

• channel (artiq.language.types.TInt32)

• gain (artiq.language.types.TInt32)

_measure(target_arr)

Measure a single sample on all 8 channels at once.

This function advances the timeline by 175 us

Parameters:

target_arr (TArray(TFloat))

Return type:

TArray(TFloat)

class atomiq.components.sinara.SamplerChannel(default_gain=0, *args, **kwargs)

Bases: atomiq.components.electronics.adc.ADCChannel

Single ADC Channel of a Sinara Sampler

This class represents a single channel of a Sinara Sampler as an ADCChannel.

Parameters:

default_gain (artiq.language.types.TInt32) -- Default gain to set for the Sampler channel at startup. (default 0)

set_gain(gain)

Set the gain for the Sampler Channel

Parameters:

gain (artiq.language.types.TInt32) -- Gain in machine units (0: 1, ..., 3: 1000)